The microstructuring of the circuit patterns formed on semiconductor wafers is increasingly progressing. As the circuit patterns become more microstructured, the effects that the defects occurring during the manufacturing processes for these semiconductor wafers will cause to a product yield are also coming to be more significant. It is increasingly important, therefore, to control the processes so as to prevent such defects from occurring during the manufacturing phase.
At semiconductor wafer-manufacturing sites, defect inspection apparatuses and defect-reviewing apparatuses are currently being used as a typical preventive measure against decreases in yield. These defect inspection apparatuses rapidly examine at what positions on the wafer a defect is present. A state of the wafer surface is imaged using optical means or electron beams, and the image is processed automatically to examine whether defects exist. In defect inspection apparatuses, because of their rapidness being important, the volume of image data is reduced by maximizing a pixel size of images to be acquired (i.e., by minimizing resolution). In a majority of cases, there is a problem in that even when the presence itself of a defect can be confirmed from a detected image of low resolution, the kind of defect which has been detected cannot be discriminated.
Defect-reviewing apparatuses are used to acquire at a reduced pixel size (i.e., at high resolution) an image of each defect detected by a defect inspection apparatus, and classify the defects. At present, defect-reviewing apparatuses for manual or computer-aided automatic image acquisition and defect classification are placed on the market by various manufacturers. The resolution of the images required for classification sufficiently high in accuracy is determined by sizes of the defects to undergo processing in the defect-reviewing apparatuses. In the manufacturing processes for the increasingly microstructured semiconductor wafers, some of the defect sizes reach the order of several tens of nanometers, so the defect-reviewing apparatuses using a scanning electron microscope (SEM) capable of enlarging pixel sizes to several nanometers are coming to be commonly used.
JP-A-2001-331784 (Patent Document 1) discloses an apparatus configuration and apparatus functions of a scanning electron microscope used for reviewing defects at a semiconductor production site (hereinafter, this microscope is referred to simply as the reviewing SEM). Patent Document 1 also describes an automatic defect reviewing (ADR) technique and an automatic defect classification (ADC) technique. The ADR technique relates to supplying the defect coordinate data obtained from a defect inspection apparatus, as well as the wafer, to the reviewing SEM, and thus automatically acquiring a defect image that is an image including various defects in a field of view, and a reference image that is an image of a nondefective pattern not including any defects in a field of view in a region having the same pattern as that of the defect image. The ADC technique relates to classifying defects using the two images.
Japanese Patent No. 3893825 (Patent Document 2) discloses a method for acquiring defect images and reference images through the ADR process. More specifically, comparisons are first conducted between a defect image formed by imaging the defective region at a low magnification (this image is hereinafter referred to as the low-magnification defect image), and a reference image formed by low-magnification imaging of the region in which a nondefective pattern of the defective region is formed (this image is hereinafter referred to as the low-magnification reference image). Next, a difference between the two images is detected as a defect. Finally, a defect image formed by imaging the detection position at a high magnification, and a reference image formed by imaging the detection position at a high magnification are acquired (the defect image is hereinafter referred to as the high-magnification defect image, and the reference image as the high-magnification reference image). The same chip is usually disposed in plurality on a semiconductor wafer. An image obtained by imaging a location that is one chip of space apart from a coordinate position at which a defect exists, therefore, is commonly used as a reference image.
During the ADC process, the high-magnification defect image and high-magnification reference image obtained from the ADR process (the two images are composed of a secondary-electron image and a reflected-electron image) are used to divide defects into a plurality of categories using several criteria. More specifically, defect classification uses several criteria. For example, a shape of the defect existing in the high-magnification defect image is examined, then a surface roughness level of the defect is examined or at what position the defect is present with respect to the circuit pattern existing behind it (e.g., whether the defect lies across an electrical interconnect, exists on one interconnect, or is present in a region free of an interconnect) is examined, and a criticality level of the defect is determined.
Technical problems associated with the reviewing SEM relate to obtaining high throughput in the ADR process for automatic acquisition of a defect image and a reference image, and to obtaining high accuracy in the ADC process for the classification of acquired defect images.
With reference to how to enhance ADR throughput, JP-A-2003-98114 (Patent Document 3) describes a technique for estimating reference images using information on periodicity of a background circuit pattern of a defect estimated from a defect image (hereinafter, this technique is referred to as the reference image combining scheme). In addition, JP-A-2006-269489 (Patent Document 4) describes a technique for acquiring high-magnification reference images by digitally zooming up low-magnification reference images (hereinafter, this technique is referred to as the digital zooming scheme). These techniques allow an image equivalent to a reference image to be acquired without using the reference image, and thus allow an ADR process time to be significantly reduced.
With reference to how to enhance ADC accuracy, it is important to acquire a high-magnification reference image having high resolution, for the following reason: in the ADC process, the high-magnification reference image is used for a defect region extraction process based on comparison with a high-magnification defect image, and for a defect criticality determination process in which to determine the criticality level of the defect by a relationship between the defect position and a circuit pattern position extracted from the high-magnification reference image, and results of the two processes affect classifying performance of ADC.